In the past, a method for producing a semiconductor wafer such as a silicon mirror-polished wafer has been generally formed of a slicing process of slicing a single crystal rod produced by a single crystal producing apparatus to obtain a thin disk-shaped wafer, a chamfering process of chamfering an outer edge portion of the wafer obtained by the slicing process to prevent a fracture and a chip in the wafer, a lapping process of lapping the chamfered wafer to flatten the wafer, an etching process of removing mechanical damage remaining on the front surface of the chamfered and lapped wafer, a polishing process of polishing the front surface of the etched wafer to a mirror-smooth state, and a cleaning process of cleaning the polished wafer.
Moreover, as the flattening process, in addition to lapping, a technique called double-head grinding by which both sides are ground at the same time by using a grindstone is also used. Furthermore, as the polishing process, there are double-side polishing by which both sides are polished at the same time and single-side polishing by which one side is polished.
Incidentally, an object of the lapping process is, for example, to provide the wafer obtained by slicing with a predetermined thickness and achieve necessary shape accuracy such as flatness and parallelism thereof. In general, it is known that the wafer subjected to lapping processing has the highest shape accuracy and it is said that this shape accuracy determines the final shape of the wafer; therefore, the shape accuracy in the lapping process is very important.
Moreover, as a lapping technique, a lapping apparatus that performs lapping by imparting relative motion to turn tables and wafers by combining three types of motion: rotation motion of concentric turn tables, orbital motion of a circular wafer holding carrier with respect to an apparatus main body, and rotation motion of the circular wafer holding carrier has been known (refer to, for example, Patent Document 1). This lapping apparatus is configured as depicted in FIGS. 5(A) and (B), for example.
As depicted in FIGS. 5(A) and (B), a lapping apparatus 101 has an upper turn table 103 and a lower turn table 104 which are provided in such a way as to face each other in a vertical direction. These upper and lower turn tables 103 and 104 are rotated by an unillustrated drive unit in opposite directions. The lower turn table 104 has a sun gear 110 in the center on a top face thereof, and a ring-shaped internal gear 109 is provided at the edge thereof.
Moreover, on the outer periphery of each wafer holding carrier 102, a gear section 111 that engages the sun gear 110 and the internal gear 109 is formed, and a gear structure is formed on the whole. In the wafer holding carriers 102, a plurality of holding holes 107 are provided. Wafers W to be lapped are inserted into the holding holes 107 and are held.
The carriers 102 holding the wafers are sandwiched between the upper and lower turn tables 103 and 104 and execute a planet gear movement, that is, make rotation and revolution between the upper and lower turn tables 103 and 104 that rotate while facing each other. To perform lapping, a turbid solution containing polishing abrasive grains such as aluminum oxide (Al2O3) or silicon carbide (SiC) and a liquid such as water containing a surface-active agent, the turbid solution called slurry, is poured out of a nozzle into a space between the upper and lower turn tables 103 and 104 through a through-hole 112 provided in the upper turn table 103 to send the abrasive grains between the wafers W and the upper and lower turn tables 103 and 104, and the shapes of the upper and lower turn tables 103 and 104 are transferred to the wafers W. Since the upper and lower turn tables and the carriers wear with use, it is necessary to replace the upper and lower turn tables and the carriers with new ones after they are used for a given period of time.
Moreover, to stop processing when the thickness of the wafers has become a target thickness, processing is performed with the thickness of the wafers being measured. As a method for performing processing while measuring the thickness of the wafers, a crystal sizing method, for example, is known (refer to Patent Document 2).
The crystal sizing method uses a piezoelectric effect that is produced when a crystal held in a holding hole of a carrier is processed with wafers and is a method by which the thickness of the wafers is measured indirectly by measuring the thickness of the crystal by using the fact that the frequency becomes high as the crystal becomes thinner.